diff options
| author | Peter Fors <peter.fors@mindkiller.com> | 2025-03-31 20:31:05 +0200 |
|---|---|---|
| committer | Peter Fors <peter.fors@mindkiller.com> | 2025-03-31 20:31:05 +0200 |
| commit | a386ef64f6376b3ef8434a6cdf456495287fcbca (patch) | |
| tree | e2da9f72ce0a565b4fac2fc8be19ab3497286b36 /mknes.h | |
| parent | d5486a5af100fb37fac08b60d862ac14943853ce (diff) | |
currently 90% working
Diffstat (limited to 'mknes.h')
| -rw-r--r-- | mknes.h | 178 |
1 files changed, 99 insertions, 79 deletions
@@ -1,84 +1,104 @@ -// PPUSTATUS ($2002) flags -#define PPU_STATUS_VBLANK 0x80 -#define PPU_STATUS_SPRITE0_HIT 0x40 -#define PPU_STATUS_OVERFLOW 0x20 - -// PPUMASK ($2001) flags -#define PPU_MASK_SHOW_BG 0x08 -#define PPU_MASK_SHOW_SPRITES 0x10 - -// PPUCTRL ($2000) flags -#define PPU_CTRL_NMI_ENABLE 0x80 -#define PPU_CTRL_MASTER_SLAVE 0x40 -#define PPU_CTRL_SPRITE_HEIGHT 0x20 -#define PPU_CTRL_BG_TABLE 0x10 -#define PPU_CTRL_SPRITE_TABLE 0x08 -#define PPU_CTRL_INCREMENT 0x04 -#define PPU_CTRL_NT_SELECT_Y 0x02 -#define PPU_CTRL_NT_SELECT_X 0x01 + +// #define PPU_CTRL_NMI_ENABLE 0x80 +// #define PPU_CTRL_MASTER_SLAVE 0x40 +// #define PPU_CTRL_SPRITE_HEIGHT 0x20 +// #define PPU_CTRL_BG_TILE_SELECT 0x10 +// #define PPU_CTRL_SPRITE_TILE_SELECT 0x08 +// #define PPU_CTRL_NT_SELECT_Y 0x04 +// #define PPU_CTRL_NT_SELECT_X 0x02 +// #define PPU_CTRL_VRAM_INCREMENT 0x01 + +// #define PPU_MASK_SHOW_BG 0x08 +// #define PPU_MASK_SHOW_SPRITES 0x10 + +// #define PPU_STATUS_VBLANK 0x80 +// #define PPU_STATUS_SPRITE0_HIT 0x40 +// #define PPU_STATUS_OVERFLOW 0x20 + +#define PPU_CTRL_BG_TILE_SELECT 0x10 +#define PPU_CTRL_SPRITE_TILE_SELECT 0x08 +#define PPU_CTRL_NMI 0x80 +#define PPU_CTRL_VRAM_INCREMENT 0x04 + +// Define constants for PPU control and mask bits +#define PPU_CTRL_NMI 0x80 +#define PPU_CTRL_VRAM_INCREMENT 0x04 +#define PPU_CTRL_SPRITE_HEIGHT 0x20 +#define PPU_CTRL_SPRITE_TILE 0x08 + +#define PPU_MASK_SHOW_BG 0x08 +#define PPU_MASK_SHOW_SPRITES 0x10 + +// Define mirroring modes +#define MIRROR_HORIZONTAL 0 +#define MIRROR_VERTICAL 1 +#define MIRROR_FOURSCREEN 2 struct nes_state; + + struct ppu_state { - uint8_t pixels[240*256]; - uint8_t sprite_pixels[256]; // Sprite pixel color indexes (BG priority resolved) - uint8_t sprite_zero_flags[256]; // 1 if pixel came from sprite #0 and is nonzero - // Sprite memory - uint8_t oam[256]; - uint8_t sec_oam[32]; + uint8_t control; + uint8_t mask; + uint8_t fine_x; + uint8_t coarse_x; + uint8_t coarse_y; + uint32_t nt_x_offset; + uint32_t nt_y_offset; + uint8_t fine_y; + + uint8_t tmp_fine_x; + uint8_t tmp_coarse_x; + uint8_t tmp_fine_y; + uint8_t tmp_coarse_y; + uint32_t tmp_nt_x; + uint32_t tmp_nt_y; + uint32_t tmp_addr; + + uint32_t vram_addr; + uint8_t write_latch; + + uint32_t cycle; + uint32_t scanline; + uint32_t dot; + uint32_t frame; + + uint32_t bg_shift_lo; + uint32_t bg_shift_hi; + uint32_t attr_shift_lo; + uint32_t attr_shift_hi; + uint8_t bg_attribute_latch; + + uint8_t next_tile; + uint8_t next_attr; + uint8_t next_lo; + uint8_t next_hi; + + uint8_t vram[2048]; + uint8_t palette[32]; + uint8_t oam[256]; uint8_t oam_addr; - uint8_t read_buffer; - - uint32_t scanline; // 0–261 - uint32_t dot; // 0–340 - - // Scroll state - uint32_t coarse_x_offs; - uint32_t coarse_y_offs; - uint32_t fine_x; - uint32_t fine_y; - uint32_t nt_base_x; - uint32_t nt_base_y; - - // Latch state for $2005/$2006 - uint8_t write_toggle; - uint32_t temp_coarse_x_offs; - uint32_t temp_coarse_y_offs; - uint32_t temp_fine_x; - uint32_t temp_fine_y; - uint32_t temp_nt_base_x; - uint32_t temp_nt_base_y; - - // Background shift registers - uint32_t bg_tile_lsb; - uint32_t bg_tile_msb; - uint32_t bg_attr_lsb; - uint32_t bg_attr_msb; - - // Tile fetch latches - uint8_t nt_byte; - uint8_t attr_byte; - uint8_t tile_lsb; - uint8_t tile_msb; - - // Control and status - uint8_t ctrl; // $2000 - uint8_t mask; // $2001 - uint8_t status; // $2002 - - // Flags - uint8_t frame_even; - uint8_t nmi_occurred; - uint8_t nmi_output; + uint8_t secondary_oam[32]; + uint32_t sprite_count; + uint8_t sprite_zero_hit; + uint8_t sprite_overflow; + + uint8_t pixels[256 * 240]; + uint8_t vblank; + uint8_t frame_ready; }; + + + struct cpu_state { uint32_t pc; // Program Counter uint8_t sp; // Stack Pointer @@ -99,7 +119,7 @@ struct cpu_state { struct ines_state { - uint16_t mapper; + uint32_t mapper; uint8_t mirroring; // 0 = H, 1 = V, 2 = 4-screen uint32_t prg_size; uint32_t chr_size; @@ -107,8 +127,8 @@ struct ines_state { struct mapper { void (*init)(struct nes_state *state); - uint8_t (*read)(struct nes_state *state, uint16_t addr); - void (*write)(struct nes_state *state, uint16_t addr, uint8_t value); + uint8_t (*read)(struct nes_state *state, uint32_t addr); + void (*write)(struct nes_state *state, uint32_t addr, uint8_t value); void (*tick)(struct nes_state *state); }; @@ -134,13 +154,13 @@ struct nes_state { uint8_t nmi_pending; }; -static const uint32_t nes_palette_argb[64] = { - 0xff757575, 0xff8f1b27, 0xffab0000, 0xff9f0047, 0xff77008f, 0xff1300ab, 0xff0000a7, 0xff000b7f, - 0xff002f43, 0xff004700, 0xff005100, 0xff173f00, 0xff5f3f1b, 0xff000000, 0xff000000, 0xff000000, - 0xffbcbcbc, 0xffef7300, 0xffef3b23, 0xfff30083, 0xffbf00bf, 0xff5b00e7, 0xff002bdb, 0xff0f4fcb, - 0xff00738b, 0xff009700, 0xff00ab00, 0xff3b9300, 0xff8b8300, 0xff000000, 0xff000000, 0xff000000, - 0xffffffff, 0xffffbf3f, 0xffff975f, 0xfffd8ba7, 0xffff7bff, 0xffb777ff, 0xff6377ff, 0xff3b9bff, - 0xff3fbff3, 0xff13d383, 0xff4bdf4f, 0xff98f858, 0xffdbeb00, 0xff000000, 0xff000000, 0xff000000, - 0xffffffff, 0xffffe7ab, 0xffffd7c7, 0xffffcbd7, 0xffffc7ff, 0xffdbc7ff, 0xffb3bfff, 0xffabdbff, - 0xffa3e7ff, 0xff83f7c7, 0xffb3ffbf, 0xffcfffb3, 0xfff3ff9f, 0xff000000, 0xff000000, 0xff000000 +static uint32_t nes_palette[64] = { + 0x757575ff, 0x271a75ff, 0x3b0072ff, 0x4c0f64ff, 0x400048ff, 0x600027ff, 0x600000ff, 0x500f00ff, + 0x783a00ff, 0x755c00ff, 0x406c00ff, 0x504764ff, 0x005468ff, 0x000000ff, 0x000000ff, 0x000000ff, + 0xbfbfbfff, 0x273aa7ff, 0x5c14a7ff, 0x7514a7ff, 0x751468ff, 0x982727ff, 0xa03a00ff, 0x986c00ff, + 0x888800ff, 0x689800ff, 0x3aa700ff, 0x6c6c6cff, 0x007878ff, 0x000000ff, 0x000000ff, 0x000000ff, + 0xffffffff, 0x3ab5ffff, 0x5cb5ffff, 0x9888ffff, 0xa778ffff, 0xc87878ff, 0xf05c00ff, 0xf08800ff, + 0xe0a700ff, 0xb8b800ff, 0x88c800ff, 0xcccc68ff, 0x00e0d8ff, 0x000000ff, 0x000000ff, 0x000000ff, + 0xffffffff, 0xa7e0ffff, 0xb8d8ffff, 0xc8c8ffff, 0xd8b8ffff, 0xd8a7a7ff, 0xf0d0b8ff, 0xf0d898ff, + 0xf0c878ff, 0xd8d878ff, 0xb8e078ff, 0xd0e0b8ff, 0xb8f0f0ff, 0x000000ff, 0x000000ff, 0x000000ff }; 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