__attribute__((hot))
static inline uint8_t memory_read(struct nes_state *state, uint32_t offset) {
	state->cpu.cycles++;
	ppu_tick(state);
	// apu_tick(state);

	uint8_t result = 0;

	if(offset >= 0x8000) {	// MOST
		result = state->mapper_function.prg_rom_read(state, offset);

	} else if(offset < 0x2000) {	// SECOND
		result = state->ram[offset & 0x07ff];

	} else if(offset < 0x4000) {	// THIRD
		result = ppu_read(state, offset);

	} else if(offset >= 0x6000) {
		result = state->mapper_function.prg_ram_read(state, offset);

	} else if(offset == 0x4016 || offset == 0x4017) {
		uint32_t index = offset & 1;
		uint8_t value = (state->ppu.input_latch[index] >> state->ppu.input_bit[index]) & 1;
		state->ppu.input_bit[index]++;
		result = value | 0x40;	// Bit 6 open bus high, bit 7 low
	}

	return result;
}

__attribute__((hot))
static inline uint8_t memory_read_dummy(struct nes_state *state, uint32_t offset) {
	state->cpu.cycles++;
	ppu_tick(state);
	// apu_tick(state);

	if(offset >= 0x2000 && offset < 0x4000) {
		return ppu_read(state, offset);
	}
	return 0;
}

__attribute__((hot))
static inline void memory_write(struct nes_state *state, uint32_t offset, uint8_t value) {
	state->cpu.cycles++;
	ppu_tick(state);
	// apu_tick(state);

	if(offset < 0x2000) {
		state->ram[offset & 0x07ff] = value;

	} else if(offset < 0x4000) {
		ppu_write(state, offset, value);

	} else if(offset < 0x4018) {
		// APU + joypad + DMA
		if(offset == 0x4014) {
			ppu_dma_4014(state, value);

		// } else if(offset == 0x4015) {	// DMC Enable (APU)
		// 	state->apu.dmc_dma_enabled = (value & 0x10) ? 1 : 0;

		} else if(offset == 0x4016) {
			uint8_t prev = state->ppu.input_strobe;
			state->ppu.input_strobe = value & 1;

			if(prev == 1 && (value & 1) == 0) {
				// Latch current inputs
				state->ppu.input_latch[0] = state->ppu.input[0];
				state->ppu.input_latch[1] = state->ppu.input[1];
				state->ppu.input_bit[0] = 0;
				state->ppu.input_bit[1] = 0;
			}

		// } else if(offset == 0x4017) {	// Frame Counter (APU)
		// 	state->apu.mode = (value >> 7) & 1;
		// 	state->apu.irq_inhibit = (value >> 6) & 1;
		// 	state->apu.frame_cycle = 0;
		// 	if(state->apu.irq_inhibit) {
		// 		state->apu.irq_pending = 0;
		// 	}
		}

	} else if(offset >= 0x6000) {	// NOTE(peter): Might need to move this upwards when we implement a mapper that has prg_ram_*
		if(offset < 0x8000) {
			state->mapper_function.prg_ram_write(state, offset, value);
		} else {
			state->mapper_function.prg_rom_write(state, offset, value);
		}
	}
}

__attribute__((hot, flatten))
static inline uint8_t memory_read_dma(struct nes_state *state, uint32_t offset) {
	// NOTE(peter): DO NOT tick CPU/PPU/APU — caller handles timing
	return state->ram[offset & 0x07ff];
}